Storage systems are increasingly utilizing non-volatile memory such as flash memory. For example, a given such system may illustratively comprise at least one storage tier comprising multiple solid-state drives (SSDs) which are implemented using flash memory or other types of non-volatile memory. All-flash storage arrays are also commonly implemented. In these and other storage systems that incorporate storage devices comprising non-volatile memory, peripheral component interconnect express (PCIe) interfaces are commonly used to support communications between a host processor and the storage devices. Although PCIe can support high bandwidth interconnections between the host processor and storage devices, it also exhibits an inherently high latency.
The high latency associated with PCIe becomes even more apparent when many small random input-output (IO) operations are issued, which is becoming increasingly common as storage devices with low-latency media are used to help bridge the performance gap between memory and traditional storage devices.
Although attempts have been made to address this issue through the use of low-latency software-based caches, such arrangements can reduce write operation durability, as volatile memory is traditionally used as the caching medium. Applications that require durable writes often cannot take advantage of low-latency software-based caches because they constantly flush data in a synchronous manner to the storage devices.
A need therefore exists for improved techniques for alleviating adverse performance impacts of the high latency commonly associated with utilization of PCIe interfaces in storage systems.